HarnesSYS monitors the design at every stage to identify errors in the design stage, before they require major corrections and jeopardize the delivery schedule.
Design rules can be managed per project to ensure that all designs comply with project or company policies, naming conventions etc. Design rules not only safeguard good design practices but also ease the transfer of knowledge to newly hired engineers.
HarnesSYS also provides tools for both designers and quality control personnel to review the logical circuit design and verify that there are no mistakes within the design. Checkers can markup a diagram and highlight specific parts and wires according to user defined criteria such as circuits, bundles, gauge and other properties using marker and style features. These tools can be real time savers for those responsible for checking the design and for maintenance. They provide an automated method to quickly identify outliers and eliminate inadvertent mistakes. Markups are in a separate layer and do not affect the underlying data, so each reviewer can create their own markup.
In addition to the graphic view, tabular reports organize circuits connected to a specific device or LRU, by system or for an entire vehicle. These reports can also be exported to other software platforms for further analysis.